 Alternate
on/off circuit
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 CD4069 pin configuration |
CD4069, a hex-inverter IC is used in this circuit. The circuit diagram is presented in this way to make the description using the true table simpler and clearer. 6V power source is applied with positive and negative connected to pin14 and pin7 respectively. Just two of the inverters in the IC are used with input pins of the remaining four inverters connected to the ground.
For the benefit of those who have not come across digital circuit like this before, I will like to quickly define logic gates. Logic gates are electronic components used in digital electronic circuit in performing logical operations on one or more logic inputs to produce a logic output. Logic input(s) and output is are voltage levels which could either be +5V for high or 0V for low. In logic circuit, 'high' or 'low', 'true' or 'false' and '1' or '0' mean the same thing. For simplicity, I will be using '1' or '0' to represent the input and output logic level as the case may be.
Logic inverter outputs voltage level directly opposite of the input. For instance if logic '1' is applied to the input, logic '0' is produced at the output. Below is the true table of logic inverter.
| Logic inverter true table |
On this note, let us quickly use the table below to describe the circuit above base on the logical operation of an inverter. The circuit is triggered to change output logic level by momentarily pressing switch SW. SW is a normally open momentary switch, this means that at the instance of power up, point A which is the input of inverter1 is '0', point B which is the output of inverter1 and input to inverter2 is '1' this charges up the capacitor via the 33K resistor. By pressing SW (1st trigger), capacitor's charge is applied to point A: A is '1', B equals '0' and C equals '1'. The loop from C to A keeps A at '1' even after the switch SW is released. Since B is '0', the capacitor would have discharged completely to '0' level so that '0' is applied to point when SW is pressed again. The process is repeated accordingly each time SW is pressed.
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A |
B |
C |
| Power up |
0 |
1 |
0 |
| 1st trigger |
1 |
0 |
1 |
| 1st trigger |
0 |
1 |
0 |
| 3rd trigger |
1 |
0 |
1 |
| Table describing the circuit |
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